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Statistical machine learning based m...

Zhang, Changshu.

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Statistical machine learning based modeling framework for design space exploration and run-time cross-stack energy optimization for many-core processors.

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Statistical machine learning based modeling framework for design space exploration and run-time cross-stack energy optimization for many-core processors./
作者:	Zhang, Changshu.
面頁冊數:	132 p.
附註:	Source: Dissertation Abstracts International, Volume: 74-09(E), Section: B.
Contained By:	Dissertation Abstracts International74-09B(E).
標題:	Engineering, Computer. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3563281
ISBN:	9781303114984

Statistical machine learning based modeling framework for design space exploration and run-time cross-stack energy optimization for many-core processors.
Zhang, Changshu.

Statistical machine learning based modeling framework for design space exploration and run-time cross-stack energy optimization for many-core processors. - 132 p.

Source: Dissertation Abstracts International, Volume: 74-09(E), Section: B.

Thesis (Ph.D.)--The University of North Carolina at Charlotte, 2013.

The complexity of many-core processors continues to grow as a larger number of heterogeneous cores are integrated on a single chip. Such systems-on-chip contains computing structures ranging from complex out-of-order cores, simple in-order cores, digital signal processors (DSPs), graphic processing units (GPUs), application specific processors, hardware accelerators, I/O subsystems, network-on-chip interconnects, and large caches arranged in complex hierarchies. While the industry focus is on putting higher number of cores on a single chip, the key challenge is to optimally architect these many-core processors such that performance, energy and area constraints are satisfied. The traditional approach to processor design through extensive cycle accurate simulations are ill-suited for designing many-core processors due to the large microarchitecture design space that must be explored. Additionally it is hard to optimize such complex processors and the applications that run on them statically at design time such that performance and energy constraints are met under dynamically changing operating conditions.

ISBN: 9781303114984Subjects--Topical Terms:

1669061
Engineering, Computer.

Statistical machine learning based modeling framework for design space exploration and run-time cross-stack energy optimization for many-core processors.
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500 $a Adviser: Arun Ravindran.
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520 $a The complexity of many-core processors continues to grow as a larger number of heterogeneous cores are integrated on a single chip. Such systems-on-chip contains computing structures ranging from complex out-of-order cores, simple in-order cores, digital signal processors (DSPs), graphic processing units (GPUs), application specific processors, hardware accelerators, I/O subsystems, network-on-chip interconnects, and large caches arranged in complex hierarchies. While the industry focus is on putting higher number of cores on a single chip, the key challenge is to optimally architect these many-core processors such that performance, energy and area constraints are satisfied. The traditional approach to processor design through extensive cycle accurate simulations are ill-suited for designing many-core processors due to the large microarchitecture design space that must be explored. Additionally it is hard to optimize such complex processors and the applications that run on them statically at design time such that performance and energy constraints are met under dynamically changing operating conditions.
520 $a The dissertation establishes statistical machine learning based modeling framework that enables the efficient design and operation of many-core processors that meets performance, energy and area constraints. We apply the proposed framework to rapidly design the microarchitecture of a many-core processor for multimedia, computer graphics rendering, finance, and data mining applications derived from the Parsec benchmark. We further demonstrate the application of the framework in the joint run-time adaptation of both the application and microarchitecture such that energy availability constraints are met.
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