東華大學圖書館 |

語系: 繁體中文

說明(常見問題)

回圖書館首頁

手機版館藏查詢

登入

回首頁

切換: 標籤 | MARC模式 | ISBD

Exploiting Parallelism in GPUs.

Hechtman, Blake.

FindBook

Google Book

Amazon

博客來

Exploiting Parallelism in GPUs.

紀錄類型:	書目-語言資料,印刷品 : Monograph/item
正題名/作者:	Exploiting Parallelism in GPUs./
作者:	Hechtman, Blake.
面頁冊數:	121 p.
附註:	Source: Dissertation Abstracts International, Volume: 75-08(E), Section: B.
Contained By:	Dissertation Abstracts International75-08B(E).
標題:	Engineering, Computer. -
電子資源:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3618622
ISBN:	9781303870637

Exploiting Parallelism in GPUs.
Hechtman, Blake.

Exploiting Parallelism in GPUs. - 121 p.

Source: Dissertation Abstracts International, Volume: 75-08(E), Section: B.

Thesis (Ph.D.)--Duke University, 2014.

Heterogeneous processors with accelerators provide an opportunity to improve performance within a given power budget. Many of these heterogeneous processors contain Graphics Processing Units (GPUs) that can perform graphics and embarrassingly parallel computation orders of magnitude faster than a CPU while using less energy. Beyond these obvious applications for GPUs, a larger variety of applications can benefit from a GPU's large computation and memory bandwidth. However, many of these applications are irregular and, as a result, require synchronization and scheduling that are commonly believed to perform poorly on GPUs. The basic building block of synchronization and scheduling is memory consistency, which is, therefore, the first place to look for improving performance on irregular applications. In this thesis, we approach the programmability of irregular applications on GPUs by thinking across traditional boundaries of the compute stack. We think about architecture, microarchitecture and runtime systems from the programmers perspective. To this end, we study architectural memory consistency on future GPUs with cache coherence. In addition, we design a GPU memory system microarchitecture that can support fine-grain and coarse-grain synchronization without sacrificing throughput. Finally, we develop a task runtime that embraces the GPU microarchitecture to perform well on fork/join parallelism desired by many programmers. Overall, this thesis contributes non-intuitive solutions to improve the performance and programmability of irregular applications from the programmer's perspective.

ISBN: 9781303870637Subjects--Topical Terms:

1669061
Engineering, Computer.

Exploiting Parallelism in GPUs.
LDR:02432nam a2200277 4500 001 1966270
005 20141106122644.5
008 150210s2014 ||||||||||||||||| ||eng d
020 $a 9781303870637
035 $a (MiAaPQ)AAI3618622
035 $a AAI3618622
040 $a MiAaPQ $c MiAaPQ
100 1 $a Hechtman, Blake. $3 2103080
245 1 0 $a Exploiting Parallelism in GPUs.
300 $a 121 p.
500 $a Source: Dissertation Abstracts International, Volume: 75-08(E), Section: B.
500 $a Adviser: Daniel Sorin.
502 $a Thesis (Ph.D.)--Duke University, 2014.
520 $a Heterogeneous processors with accelerators provide an opportunity to improve performance within a given power budget. Many of these heterogeneous processors contain Graphics Processing Units (GPUs) that can perform graphics and embarrassingly parallel computation orders of magnitude faster than a CPU while using less energy. Beyond these obvious applications for GPUs, a larger variety of applications can benefit from a GPU's large computation and memory bandwidth. However, many of these applications are irregular and, as a result, require synchronization and scheduling that are commonly believed to perform poorly on GPUs. The basic building block of synchronization and scheduling is memory consistency, which is, therefore, the first place to look for improving performance on irregular applications. In this thesis, we approach the programmability of irregular applications on GPUs by thinking across traditional boundaries of the compute stack. We think about architecture, microarchitecture and runtime systems from the programmers perspective. To this end, we study architectural memory consistency on future GPUs with cache coherence. In addition, we design a GPU memory system microarchitecture that can support fine-grain and coarse-grain synchronization without sacrificing throughput. Finally, we develop a task runtime that embraces the GPU microarchitecture to perform well on fork/join parallelism desired by many programmers. Overall, this thesis contributes non-intuitive solutions to improve the performance and programmability of irregular applications from the programmer's perspective.
590 $a School code: 0066.
650 4 $a Engineering, Computer. $3 1669061
650 4 $a Computer Science. $3 626642
690 $a 0464
690 $a 0984
710 2 $a Duke University. $b Electrical and Computer Engineering. $3 1032075
773 0 $t Dissertation Abstracts International $g 75-08B(E).
790 $a 0066
791 $a Ph.D.
792 $a 2014
793 $a English
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3618622