東華大學圖書館 |

Language: English

Help

回圖書館首頁

手機版館藏查詢

Back

Switch To: Labeled | MARC Mode | ISBD

Effects of dimensional nanoscaling o...

Sharma, Ashwani Kumar.

Linked to FindBook

Google Book

Amazon

博客來

Effects of dimensional nanoscaling on the optical and electronic properties of silicon films-walls-wires.

Record Type:	Electronic resources : Monograph/item
Title/Author:	Effects of dimensional nanoscaling on the optical and electronic properties of silicon films-walls-wires./
Author:	Sharma, Ashwani Kumar.
Description:	295 p.
Notes:	Source: Dissertation Abstracts International, Volume: 65-09, Section: B, page: 4749.
Contained By:	Dissertation Abstracts International65-09B.
Subject:	Engineering, Electronics and Electrical. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3148065
ISBN:	0496071572

Effects of dimensional nanoscaling on the optical and electronic properties of silicon films-walls-wires.
Sharma, Ashwani Kumar.

Effects of dimensional nanoscaling on the optical and electronic properties of silicon films-walls-wires. - 295 p.

Source: Dissertation Abstracts International, Volume: 65-09, Section: B, page: 4749.

Thesis (Ph.D.)--The University of New Mexico, 2004.

A detailed experimental and theoretical investigation focused upon evaluating the effects of dimensional nanoscaling of silicon features on the optical and electronic properties of the material is presented. The feature dimensions in this work ranged from &sim;200nm down to &sim;10nm. This range represents the transition region from material bulk properties towards the onset of quantization. These structures were fabricated on silicon-on-insulator using interferometric lithography, reactive-ion-etching and thermal oxidation methods. In order to investigate the optical and electronic properties, the nanostructures were configured in a two terminal metal-semiconductor-metal test device arrangement. The metal-semiconductor interfaces formed Schottky barrier type contacts. The metal-semiconductor-metal configuration was chosen for this study due to its practicality in photonic and electronic parameter characterization and the ease of device fabrication. Characterization methods included optical steady-state DC measurements, dark current measurements, spectral response measurements as a function of wavelength, and transient time response measurements using a modified version of the Haynes-Shockley experiment for evaluating the carrier mobility as a function of feature size. Results show that the total carrier drift-diffusion dependent conduction for same biasing conditions increased as the feature dimension was reduced from &sim;200nm to &sim;10nm. The transient time response measurements show that the low field electron mobility can be increased in the best case at room temperature from &sim;1000 cm2/V-s to &sim;4000 cm2/V-s as the cross-sectional area becomes narrower due to confinement effects. Theoretical models for optical coupling and electronic transport properties are provided to give physical insight at these small scales. To demonstrate the potentials of nanoscaling that would benefit the Si CMOS industry, a high mobility &sim;50nm nanowire wrap-around-gate MOSFET was developed as a proof of concept device that showed 3X improvement in the current driving capability over comparable conventional planar slab gate length devices due reduced transverse scattering effects.

ISBN: 0496071572Subjects--Topical Terms:

626636
Engineering, Electronics and Electrical.

Effects of dimensional nanoscaling on the optical and electronic properties of silicon films-walls-wires.
LDR:03153nmm 2200289 4500 001 1839787
005 20050630133819.5
008 130614s2004 eng d
020 $a 0496071572
035 $a (UnM)AAI3148065
035 $a AAI3148065
040 $a UnM $c UnM
100 1 $a Sharma, Ashwani Kumar. $3 1928159
245 1 0 $a Effects of dimensional nanoscaling on the optical and electronic properties of silicon films-walls-wires.
300 $a 295 p.
500 $a Source: Dissertation Abstracts International, Volume: 65-09, Section: B, page: 4749.
500 $a Adviser: S. R. J. Brueck.
502 $a Thesis (Ph.D.)--The University of New Mexico, 2004.
520 $a A detailed experimental and theoretical investigation focused upon evaluating the effects of dimensional nanoscaling of silicon features on the optical and electronic properties of the material is presented. The feature dimensions in this work ranged from &sim;200nm down to &sim;10nm. This range represents the transition region from material bulk properties towards the onset of quantization. These structures were fabricated on silicon-on-insulator using interferometric lithography, reactive-ion-etching and thermal oxidation methods. In order to investigate the optical and electronic properties, the nanostructures were configured in a two terminal metal-semiconductor-metal test device arrangement. The metal-semiconductor interfaces formed Schottky barrier type contacts. The metal-semiconductor-metal configuration was chosen for this study due to its practicality in photonic and electronic parameter characterization and the ease of device fabrication. Characterization methods included optical steady-state DC measurements, dark current measurements, spectral response measurements as a function of wavelength, and transient time response measurements using a modified version of the Haynes-Shockley experiment for evaluating the carrier mobility as a function of feature size. Results show that the total carrier drift-diffusion dependent conduction for same biasing conditions increased as the feature dimension was reduced from &sim;200nm to &sim;10nm. The transient time response measurements show that the low field electron mobility can be increased in the best case at room temperature from &sim;1000 cm2/V-s to &sim;4000 cm2/V-s as the cross-sectional area becomes narrower due to confinement effects. Theoretical models for optical coupling and electronic transport properties are provided to give physical insight at these small scales. To demonstrate the potentials of nanoscaling that would benefit the Si CMOS industry, a high mobility &sim;50nm nanowire wrap-around-gate MOSFET was developed as a proof of concept device that showed 3X improvement in the current driving capability over comparable conventional planar slab gate length devices due reduced transverse scattering effects.
590 $a School code: 0142.
650 4 $a Engineering, Electronics and Electrical. $3 626636
650 4 $a Physics, Electricity and Magnetism. $3 1019535
650 4 $a Physics, Optics. $3 1018756
690 $a 0544
690 $a 0607
690 $a 0752
710 2 0 $a The University of New Mexico. $3 1018024
773 0 $t Dissertation Abstracts International $g 65-09B.
790 1 0 $a Brueck, S. R. J., $e advisor
790 $a 0142
791 $a Ph.D.
792 $a 2004
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3148065