Language:
English
繁體中文
Help
回圖書館首頁
手機版館藏查詢
Login
Back
Switch To:
Labeled
|
MARC Mode
|
ISBD
The design and synthesis of concurre...
~
Tugsinavisut, Sunan.
Linked to FindBook
Google Book
Amazon
博客來
The design and synthesis of concurrent asynchronous systems .
Record Type:
Electronic resources : Monograph/item
Title/Author:
The design and synthesis of concurrent asynchronous systems ./
Author:
Tugsinavisut, Sunan.
Description:
162 p.
Notes:
Source: Dissertation Abstracts International, Volume: 67-10, Section: B, page: 5969.
Contained By:
Dissertation Abstracts International67-10B.
Subject:
Engineering, Electronics and Electrical. -
Online resource:
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3237182
ISBN:
9780542912887
The design and synthesis of concurrent asynchronous systems .
Tugsinavisut, Sunan.
The design and synthesis of concurrent asynchronous systems .
- 162 p.
Source: Dissertation Abstracts International, Volume: 67-10, Section: B, page: 5969.
Thesis (Ph.D.)--University of Southern California, 2006.
This dissertation explores the design and synthesis of concurrent asynchronous systems. In the first part, we perform an extensive case study of a DCT matrix-vector multiplier using several different micro-architectural designs and circuit styles. This includes a bundled-data implementation that motivates the development of efficient control circuit templates. By adopting templates that can easily handle complex control, the designer can save significant design time. In addition, a quasi-delay-insensitive (QDI) implementation motivates design exploration of several different micro-architectural tradeoffs and optimizations. Experimental results comparing these designs to a full-custom synchronous counterpart show that various implementations yield different advantages. The bundled-data designs achieve higher average performance with negligible power and area increases, while the QDI designs provide much higher throughput, more robust to process variations, and reduced design time at the expense of higher power and larger area.
ISBN: 9780542912887Subjects--Topical Terms:
626636
Engineering, Electronics and Electrical.
The design and synthesis of concurrent asynchronous systems .
LDR
:02872nmm 2200277 4500
001
1834426
005
20071119145648.5
008
130610s2006 eng d
020
$a
9780542912887
035
$a
(UMI)AAI3237182
035
$a
AAI3237182
040
$a
UMI
$c
UMI
100
1
$a
Tugsinavisut, Sunan.
$3
1923078
245
1 4
$a
The design and synthesis of concurrent asynchronous systems .
300
$a
162 p.
500
$a
Source: Dissertation Abstracts International, Volume: 67-10, Section: B, page: 5969.
500
$a
Adviser: Peter A. Beerel.
502
$a
Thesis (Ph.D.)--University of Southern California, 2006.
520
$a
This dissertation explores the design and synthesis of concurrent asynchronous systems. In the first part, we perform an extensive case study of a DCT matrix-vector multiplier using several different micro-architectural designs and circuit styles. This includes a bundled-data implementation that motivates the development of efficient control circuit templates. By adopting templates that can easily handle complex control, the designer can save significant design time. In addition, a quasi-delay-insensitive (QDI) implementation motivates design exploration of several different micro-architectural tradeoffs and optimizations. Experimental results comparing these designs to a full-custom synchronous counterpart show that various implementations yield different advantages. The bundled-data designs achieve higher average performance with negligible power and area increases, while the QDI designs provide much higher throughput, more robust to process variations, and reduced design time at the expense of higher power and larger area.
520
$a
In the second part, we present a high-level synthesis framework for highly concurrent systems that can handle multi-threading and pipelined behaviors, which are typical in asynchronous systems. We propose the use of marked graphs because they can naturally express highly concurrent systems. We address several issues relating to the cyclic nature of marked graphs and propose both exact and heuristic performance-driven scheduling and allocation algorithms. The scheduling and allocation algorithms, however, do not address the binding problem. Hence, we propose performance-driven concurrent scheduling and binding algorithms: one exact algorithm and one heuristic algorithm. A coloring approach is used to formulate and solve the binding problem. Experimental results show the performance and area tradeoffs of various designs by controlling concurrency in the design and also highlight the tradeoffs of the proposed exact and heuristic algorithms.
590
$a
School code: 0208.
650
4
$a
Engineering, Electronics and Electrical.
$3
626636
690
$a
0544
710
2 0
$a
University of Southern California.
$3
700129
773
0
$t
Dissertation Abstracts International
$g
67-10B.
790
1 0
$a
Beerel, Peter A.,
$e
advisor
790
$a
0208
791
$a
Ph.D.
792
$a
2006
856
4 0
$u
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3237182
based on 0 review(s)
Location:
ALL
電子資源
Year:
Volume Number:
Items
1 records • Pages 1 •
1
Inventory Number
Location Name
Item Class
Material type
Call number
Usage Class
Loan Status
No. of reservations
Opac note
Attachments
W9225445
電子資源
11.線上閱覽_V
電子書
EB
一般使用(Normal)
On shelf
0
1 records • Pages 1 •
1
Multimedia
Reviews
Add a review
and share your thoughts with other readers
Export
pickup library
Processing
...
Change password
Login