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Low dielectric constant materials an...
~
Vedula, Ramakrishna.
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Low dielectric constant materials and processes for interlayer dielectric applications.
紀錄類型:
書目-電子資源 : Monograph/item
正題名/作者:
Low dielectric constant materials and processes for interlayer dielectric applications./
作者:
Vedula, Ramakrishna.
面頁冊數:
115 p.
附註:
Source: Dissertation Abstracts International, Volume: 67-01, Section: B, page: 0454.
Contained By:
Dissertation Abstracts International67-01B.
標題:
Engineering, Electronics and Electrical. -
電子資源:
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3206194
ISBN:
054252208X
Low dielectric constant materials and processes for interlayer dielectric applications.
Vedula, Ramakrishna.
Low dielectric constant materials and processes for interlayer dielectric applications.
- 115 p.
Source: Dissertation Abstracts International, Volume: 67-01, Section: B, page: 0454.
Thesis (Ph.D.)--University of Massachusetts Amherst, 2006.
At 0.18 microns and below minimum device dimensions in Ultra Large Scale Integrated Circuits, signal net parasitic delay amounts to 80% of the overall path delay. This leads to serious problems relating to signal timing, crosstalk, noise and power consumption. Although Copper is being used as an alternative to Aluminum interconnects to reduce the resistive component of the RC delays, finding a suitable material to replace Silicon Dioxide (SiO2) as the interlayer dielectric poses serious challenges.
ISBN: 054252208XSubjects--Topical Terms:
626636
Engineering, Electronics and Electrical.
Low dielectric constant materials and processes for interlayer dielectric applications.
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At 0.18 microns and below minimum device dimensions in Ultra Large Scale Integrated Circuits, signal net parasitic delay amounts to 80% of the overall path delay. This leads to serious problems relating to signal timing, crosstalk, noise and power consumption. Although Copper is being used as an alternative to Aluminum interconnects to reduce the resistive component of the RC delays, finding a suitable material to replace Silicon Dioxide (SiO2) as the interlayer dielectric poses serious challenges.
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Most of the inorganic candidates are variants of SiO2, while the most prominent among polymeric materials belong to the polyparaxylylene family. The primary disadvantage of polyparaxylylene materials is their low thermal stability. While SiO2 based inorganic films exhibit excellent thermal stability, they offer only incremental improvement in the dielectric constant. The thin film deposition technique for these materials is important as it directly impacts the cost of manufacturing. Chemical Vapor Deposition is known to make high purity, conformal thin films, and is compatible with current silicon manufacturing technology.
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This research is primarily focused to develop materials which have (i) Low dielectric Constant; (ii) High thermal stability, and to deposit them using Chemical Vapor Deposition technique. The vision was to develop a composite thin film material with the thermal stability of SiO2 and the low dielectric constant of paraxylylenes. The first objective of this research was to develop a technique to deposit SiO2 films at near room temperatures. Thin conformal films of SiO2 were deposited at temperatures around 50°C using Di-acetoxy-di-tertiary-butoxy silane (DADBS) as the precursor. The thermal stability, optical and electrical properties of the codeposited thin films were systematically studied. It was possible to control the composition of these films smoothly and these films were shown to be of nanocomposite type. However, the thermal stability of these nanocomposite thin films was only marginally better than that of paraxylylenes. These films were then heat treated under oxygen to 'burn off' the polymer content. It was shown that annealing these films in oxygen environment leaves porous SiO 2 which exhibits the thermal stability of SiO2 and the porosity results in lower dielectric constant.
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