東華大學圖書館 |

Language: English

Help

回圖書館首頁

手機版館藏查詢

Back

Switch To: Labeled | MARC Mode | ISBD

Fault diagnostic techniques for deep...

Wang, Zhiyuan.

Linked to FindBook

Google Book

Amazon

博客來

Fault diagnostic techniques for deep submicron design.

Record Type:	Electronic resources : Monograph/item
Title/Author:	Fault diagnostic techniques for deep submicron design./
Author:	Wang, Zhiyuan.
Description:	191 p.
Notes:	Source: Dissertation Abstracts International, Volume: 66-02, Section: B, page: 1093.
Contained By:	Dissertation Abstracts International66-02B.
Subject:	Engineering, Electronics and Electrical. -
Online resource:	http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3163124
ISBN:	0496968327

Fault diagnostic techniques for deep submicron design.
Wang, Zhiyuan.

Fault diagnostic techniques for deep submicron design. - 191 p.

Source: Dissertation Abstracts International, Volume: 66-02, Section: B, page: 1093.

Thesis (Ph.D.)--University of California, Santa Barbara, 2005.

As 90nm process technology starts to merge into the mainstream manufacture of high-end ICs, and manufacturing process variations increase, the demand for high-quality Electrical Design Automation (EDA) tools, especially defect-diagnosis tools, grows dramatically.

ISBN: 0496968327Subjects--Topical Terms:

626636
Engineering, Electronics and Electrical.

Fault diagnostic techniques for deep submicron design.
LDR:02341nmm 2200289 4500 001 1813091
005 20060427133128.5
008 130610s2005 eng d
020 $a 0496968327
035 $a (UnM)AAI3163124
035 $a AAI3163124
040 $a UnM $c UnM
100 1 $a Wang, Zhiyuan. $3 1902617
245 1 0 $a Fault diagnostic techniques for deep submicron design.
300 $a 191 p.
500 $a Source: Dissertation Abstracts International, Volume: 66-02, Section: B, page: 1093.
500 $a Chairperson: Malgorzata Marek-Sadowska.
502 $a Thesis (Ph.D.)--University of California, Santa Barbara, 2005.
520 $a As 90nm process technology starts to merge into the mainstream manufacture of high-end ICs, and manufacturing process variations increase, the demand for high-quality Electrical Design Automation (EDA) tools, especially defect-diagnosis tools, grows dramatically.
520 $a The purpose of defect diagnosis is to determine the cause of failure in a manufactured, faulty chip. A good diagnostic tool should effectively assist a designer in quickly and accurately locating the failure. The quality of a diagnosis impacts directly the time-to-market and the total product cost.
520 $a This dissertation consists of four parts. In the first part, we present a multiple-fault-diagnosis methodology. Two algorithms are proposed to enhance the diagnosis efficiency. Also n-detection tests are used to further improve the diagnosability. In the second part, we first describe the proposed graph-based circuit representation; then we analyze the multiple-fault diagnosis problem in depth and propose our diagnosis algorithm. To improve the applicability of our algorithm, an efficient heuristic is proposed by utilizing layout information. In the third part, we explain how we utilized circuit timing information. Also we have proposed a simulation-based technique to significantly improve the diagnostic resolution for at-speed related defects. In the last part, we proposed a methodology to deal with the hold-time defects that occur at the data path.
590 $a School code: 0035.
650 4 $a Engineering, Electronics and Electrical. $3 626636
690 $a 0544
710 2 0 $a University of California, Santa Barbara. $3 1017586
773 0 $t Dissertation Abstracts International $g 66-02B.
790 1 0 $a Marek-Sadowska, Malgorzata, $e advisor
790 $a 0035
791 $a Ph.D.
792 $a 2005
856 4 0 $u http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3163124