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Designing Digital Computer Systems w...

Lilja, David J.

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Designing Digital Computer Systems with Verilog.

紀錄類型:	書目-電子資源 : Monograph/item
正題名/作者:	Designing Digital Computer Systems with Verilog./
作者:	Lilja, David J.
其他作者:	Sapatnekar, Sachin S.
出版者:	Leiden :Cambridge University Press, : 2004.,
面頁冊數:	176 p.
內容註:	Cover; Half-title; Title; Copyright; Contents; Preface; 1 Controlling complexity; 2 A Verilogical place to start; 3 Defining the instruction set architecture; 4 Algorithmic behavioral modeling; 5 Building an assembler for VeSPA; 6 Pipelining; 7 Implementation of the pipelined processor; 8 Verification; APPENDIX A The VeSPA instruction set architecture (ISA); APPENDIX B The VASM assembler; Index
標題:	Verilog (Computer hardware description language). -
電子資源:	http://dx.doi.org/10.1017/CBO9780511607059Click here to view book
ISBN:	9780511607059 (electronic bk.)

Designing Digital Computer Systems with Verilog.
Lilja, David J.

Designing Digital Computer Systems with Verilog.[electronic resource]. - Leiden :Cambridge University Press,2004. - 176 p.

Cover; Half-title; Title; Copyright; Contents; Preface; 1 Controlling complexity; 2 A Verilogical place to start; 3 Defining the instruction set architecture; 4 Algorithmic behavioral modeling; 5 Building an assembler for VeSPA; 6 Pipelining; 7 Implementation of the pipelined processor; 8 Verification; APPENDIX A The VeSPA instruction set architecture (ISA); APPENDIX B The VASM assembler; Index

This is both an introduction to computer architecture and a guide to using a hardware description language (HDL) to design a simple processor. The authors demonstrate how behavioral and structural models can be developed using the popular Verilog HDL. For senior and graduate students, and practising engineers.

Electronic reproduction.

Available via World Wide Web.

Mode of access: World Wide Web.

ISBN: 9780511607059 (electronic bk.)Subjects--Topical Terms:

750071
Verilog (Computer hardware description language).
Index Terms--Genre/Form:

542853
Electronic books.

LC Class. No.: TK7885.7 .L55 2005eb

Dewey Class. No.: 621.392

Designing Digital Computer Systems with Verilog.
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245 1 0 $a Designing Digital Computer Systems with Verilog. $h [electronic resource].
260 $a Leiden : $b Cambridge University Press, $c 2004.
300 $a 176 p.
505 0 $a Cover; Half-title; Title; Copyright; Contents; Preface; 1 Controlling complexity; 2 A Verilogical place to start; 3 Defining the instruction set architecture; 4 Algorithmic behavioral modeling; 5 Building an assembler for VeSPA; 6 Pipelining; 7 Implementation of the pipelined processor; 8 Verification; APPENDIX A The VeSPA instruction set architecture (ISA); APPENDIX B The VASM assembler; Index
520 $a This is both an introduction to computer architecture and a guide to using a hardware description language (HDL) to design a simple processor. The authors demonstrate how behavioral and structural models can be developed using the popular Verilog HDL. For senior and graduate students, and practising engineers.
533 $a Electronic reproduction. $n Available via World Wide Web.
538 $a Mode of access: World Wide Web.
650 4 $a Verilog (Computer hardware description language). $3 750071
655 7 $a Electronic books. $2 lcsh $3 542853
700 1 $a Sapatnekar, Sachin S. $3 1898737
710 2 $a Ebooks Corporation. $3 1314793
776 1 $z 9780521828666
856 4 0 $z Click here to view book $u http://dx.doi.org/10.1017/CBO9780511607059