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Testing and diagnosis for systematic...
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Kim, Dongok.
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Testing and diagnosis for systematic defects based on design-for-manufacturability guidelines.
紀錄類型:
書目-語言資料,印刷品 : Monograph/item
正題名/作者:
Testing and diagnosis for systematic defects based on design-for-manufacturability guidelines./
作者:
Kim, Dongok.
面頁冊數:
93 p.
附註:
Source: Dissertation Abstracts International, Volume: 71-09, Section: B, page: 5662.
Contained By:
Dissertation Abstracts International71-09B.
標題:
Engineering, Computer. -
電子資源:
http://pqdd.sinica.edu.tw/twdaoapp/servlet/advanced?query=3413742
ISBN:
9781124151045
Testing and diagnosis for systematic defects based on design-for-manufacturability guidelines.
Kim, Dongok.
Testing and diagnosis for systematic defects based on design-for-manufacturability guidelines.
- 93 p.
Source: Dissertation Abstracts International, Volume: 71-09, Section: B, page: 5662.
Thesis (Ph.D.)--Purdue University, 2010.
The occurrence of systematic defects is increasing with shrinking feature sizes of manufacturing processes. Design-for-manufacturability (DFM) rules and guidelines are layout constraints that are followed for ensuring yield and manufacturability. In spite of the use of DFM rules and guidelines, systematic defects may occur because complete information about process and fabrication defects is not available due to the decreasing window of time to market and the constraints on layout geometry.
ISBN: 9781124151045Subjects--Topical Terms:
1669061
Engineering, Computer.
Testing and diagnosis for systematic defects based on design-for-manufacturability guidelines.
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The occurrence of systematic defects is increasing with shrinking feature sizes of manufacturing processes. Design-for-manufacturability (DFM) rules and guidelines are layout constraints that are followed for ensuring yield and manufacturability. In spite of the use of DFM rules and guidelines, systematic defects may occur because complete information about process and fabrication defects is not available due to the decreasing window of time to market and the constraints on layout geometry.
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Noting that DFM guidelines already predict the most important sources of systematic defects, DFM guidelines are used in this dissertation as a basis for modeling, test generation and diagnosis for systematic defects. The basic process we use for this purpose is the following. Layout locations that are potential sites for systematic defects are found by tightening DFM guidelines. Affected transistors are identified at the schematic level, and defect behaviors are translated to gate level logic faults. Fault grading is applied to identify potential test holes. Additional test content is generated for improving test quality. Experimental results of this process were obtained for an Intel Pentium R 4 design demonstrating the feasibility of linking systematic defects and DFM guidelines.
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The methodology is extended to prioritize layout locations according to the importance of applying DFM guidelines to them. A higher priority is given to layout locations where failure to follow a DFM guideline will result in test holes due to defects that are hard-to-detect. The prioritized list can be used by layout tools to create circuits that are easier to test for systematic defects.
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We also investigate the use of DFM guidelines during the defect diagnosis process with the goal of identifying which DFM guidelines are responsible for the defects present in failing chips. We introduce a new metric called diagnostic coefficient that allows us to rank the guidelines according to their contribution of hard-to-diagnose defects. DFM guidelines that are ranked high should be applied earlier in order to obtain circuits that are easier to diagnose for systematic defects.
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